Conference

Chae-Hwan Park, Seung Yoon Shin, Seong Eun Kim, Min Kang, and Soo-Yeon Lee
A Schmitt-Trigger Comperator-Based Noise-Robust Reconfigurable Leaky Integrate-and-Fire Neuron Circuit for Spiking Neural Networks

KCS 2026 · Jeongseon, Korea Poster
Chae-Hwan Park, Jaybum Kim, Kyeong-Soo Kang, Hyeon-Gu Kang, and Soo-Yeon Lee
Micro-LED Pixel Circuit with A Novel NMOS-Oxide TFT Inverter for Reducing Falling Time and Enhancing Gray-Level Expression

SID 2025 · San Jose, USA Poster

🔗 Paper
Chae-Hwan Park, Soobin An, Seungyoon Shin, Ji-Ho Lee, Hyeonjun Choi, and Soo-Yeon Lee
고성능 디스플레이 화소 회로 설계를 위한 TFT 인버터 특성 비교

KMID 2025 · Gangneung, Korea Poster
Chae-Hwan Park, Kyeong-Soo Kang, Ji-Hwan Park, Chanjin Park, and Soo-Yeon Lee
μLED pixel circuit based on Low-Temperature Polysilicon and Oxide Thin Film Transistors for pulse width modulation with extremely short falling time

ICEP-ITA 2024 · Tashkent, Uzbekistan Oral

Research Topic

CMOS/TFT Circuit Design

I conduct research on Si-based CMOS and IGZO-based TFT circuit design and verification, focusing on neuromorphic (SNN-based neuron circuit) and display driving circuits (OLED, μLED), with a growing interest in mixed-signal circuit design integrating analog and digital circuits.

Si-CMOS IGZO-TFT Neuron circuit

System Architecture Design

I focus on hardware system design bridging custom devices, CMOS circuits, and PCB-level electronics. My work includes MCU/FPGA-based control, AFE-optimized sensing, and low-power integrated platforms for future sensing, display-integrated, and neuromorphic systems.

PCB FPGA MCU/MPU Sensor